ASIC Design Verification Engineer

Job Details ASIC Design Verification Engineer 12 Months Contract with Possible Extension Austin, TX & Menlo Park, CA Job Summary We are seeking a highly motivated ASIC Design Verification Engineer to join our silicon engineering team. The ideal candidate will have strong experience in SystemVerilog/UVM-based verification of complex IPs or SoCs and will be responsible for developing test cases, debugging RTL issues, and driving coverage closure. Responsibilities Maintain reusable SystemVerilog/U…