CPU Server Synthesis and STA Engineer

Design and optimize CPU server hardware using synthesis, formal verification, and static timing analysis. Develop timing constraints, analyze power and performance trade-offs, debug verification and timing issues, and collaborate with cross-functional stakeholders. Perform complex data-path-oriented, multi-million-gate synthesis. Develop constraints for multi-clock domains and hierarchical or flat timing analysis. Perform multi-power-domain synthesis and structural power checks using CLP. Run f…