Low Power Verification Lead

Job Description Our partner is looking for a Low Power Verification Lead to ensure low power intent is implemented and verified correctly across the full design flow. The role focuses on VCLP signoff, UPF development, hierarchical low power verification and convergence between RTL, synthesis and physical design. Location: Barcelona, Spain, Hybrid Level: Senior Responsibilities Develop and maintain UPF for hierarchical designs Validate low power architecture and intent across multiple power doma…