Lead Design Verification Engineer, High Speed Interface Protocols

Job Description Our partner is looking for a Lead Design Verification Engineer to lead functional verification of high speed interface protocol blocks at IP and subsystem level. The role combines hands on verification ownership with technical leadership, covering UVM environments, protocol compliance, debug, coverage closure and coordination with RTL, architecture, firmware and verification teams. Location: Barcelona, Spain, Hybrid Level: Lead Responsibilities Lead IP and subsystem level functi…