Intern Validation Engineer

Intern Validation Engineer Job Description Renesas is seeking a brilliant and motivated MSc student in Electronic Engineering for an internship to develop his/her final graduation thesis. The internship has a duration of six months to be spent in the new Renesas design center located in Catania, Italy. Objective of the internship is to perform research and development in the silicon validation automation domain with a special focus on Power Management IC. During the internship, the candidate wi…