Senior ASIC Verification Lead - UVM Validation & Growth

Bull is seeking an Asic Verification Lead to join its dynamic team in Madrid or Barcelona. You will drive verification strategy for Bull’s high-end servers, leading UVM-based methodologies and collaborating with architecture and design teams to ensure reliability and performance. The ideal candidate has 8 years of ASIC/SoC verification experience, a BE/BTech or ME/MTech, and deep knowledge of UVM, SystemVerilog, and C++. J-18808-Ljbffr