Design Verification Engineer

Design Verification Engineer Location: Bay Area, CA (Onsite/Hybrid) Experience: 8 Years Job Summary We are seeking an experienced Design Verification Engineer with strong expertise in ASIC/SoC verification to join our semiconductor team. The ideal candidate will have extensive experience in SystemVerilog, UVM, and protocol verification, with a proven track record of developing robust verification environments and achieving coverage closure. Key Responsibilities Develop and execute comprehensive…