Lead Analog/Mixed-Signal IC Layout for High-Perf ASICs

Astera Labs (NASDAQ: ALAB) is hiring an Analog / Mixed-Signal Layout Engineer to join its ASIC team, advancing high-performance compute and networking in advanced CMOS nodes. The ideal candidate has a hardware background with emphasis in VLSI/Computer Architecture and hands-on RTL design or verification experience. The role requires familiarity with Verilog/SystemVerilog, UVM, and scripting (Python/Perl) with C/C++ alongside exposure to PCIe, DDR, HBM, and Serdes interfaces. J-18808-Ljbffr