Formal Verification Lead

Job Description Our partner is looking for a Formal Verification Lead to drive equivalence checking and formal signoff across RTL, synthesis and physical implementation stages. The role focuses on RTL to Gate and Gate to Gate equivalence, low power intent, ECO validation and methodology improvement across hierarchical designs. Location: Barcelona, Spain, Hybrid Level: Senior Responsibilities Perform RTL to Gate and Gate to Gate equivalence checks Drive LEC signoff using Synopsys Formality or si…