Senior Design Engineer — SoC RTL & Verification

Silicon Labs in Singapore is seeking a Senior Design Engineer to drive block architecture and the design of digital circuits for next-generation SoCs. You will implement RTL code and integrate digital blocks into the SoC, verify using directed, random, and assertion-based methods, and develop embedded firmware to support validation. The role also covers documentation and the creation of reference manuals and datasheet material while collaborating with cross-functional teams globally. J-18808-Lj…