ASIC SoC RTL Design Engineer

Pay Range: $75.00hr - $80.00hr Job Overview: The candidate will analyze and understand existing ASIC/SoC RTL implementations, design structures, and digital logic. The role involves performing detailed RTL analysis to identify module functionality, design intent, and architectural behavior while tracing control and data paths across complex hierarchies. Responsibilities: Analyze and understand existing ASIC/SoC RTL implementations, design structures, and digital logic. Perform RTL analysis to i…