Senior Verification Engineer - Core Testbench & DV Methodology Lead

Job Description Our partner is looking for a Senior or Principal Verification Engineer to own the core level verification environment, methodology, tooling and CI infrastructure for complex processor designs. The role focuses on evolving the top level UVM testbench, integrating unit level VIP, driving functional and code coverage closure, improving verification flows and identifying gaps between processor units. You will also act as a senior technical reference for verification methodology, tes…